1. Individually develop PDK library base on PAS/skill language, including pcell, callback, CDF, symbol view, etc.

2. Skilled with Cadence virtuoso, caliber, pvs, icv etc. able to complete PDK simulation and physical verification independently.

3. Familiar with device layout structure, layout design rule and spice model, able to develop PDK base on customer and process requirement.

4. Skilled with TCL/perl, able to realize the automation of PDK development and verification is a plus

任職資格:

1.B.S. Minimum, Masters preferred in Micro-electronics or Physics

2.3 or more years relevant experience, be familiar with semiconductor process, device characterization

3.Team work and problem solving skills